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[VHDL-FPGA-VerilogPWM_DCmotorControl

Description: 基于VHDL的直流电机的PWM控制程序。-The VHDL-based DC motor PWM control procedures.
Platform: | Size: 193536 | Author: luoqianyou | Hits:

[VHDL-FPGA-VerilogPWM

Description: Core_PWM,verilog语言编写,可用于电机驱动-Core_PWM, verilog language, can be used for motor drive
Platform: | Size: 5007360 | Author: zhan | Hits:

[VHDL-FPGA-VerilogPWM

Description: Core_PWM,verilog语言编写,可用于电机驱动-Core_PWM, verilog language, can be used for motor drive
Platform: | Size: 2048 | Author: zhan | Hits:

[VHDL-FPGA-VerilogPWM_CT

Description: PWM调制输出、定时和计数控制器的芯片设计-PWM modulation output, timing and count controller chip design
Platform: | Size: 5120 | Author: 李利歌 | Hits:

[VHDL-FPGA-Verilogsopc

Description: SOPC实验--自定义PWM组件:以带一个Avalon Slave 接口的PWM 组件为例,说明如何自定义组件。,一个Avalon Slave 接口可以有clk、chipselect、address、read、readdata、write 及writedata 等信号,但这些信号都不是必需的。 一、功能 我们要实现的PWM 组件具有以下功能: 1. PWM 的周期可改,用period 寄存器存储; 2. PWM 的占空比可改,用duty 寄存器存储。 二、Avalon Slave 接口信号的设计 1.Clk:为PWM 提供时钟; 2.Write:写信号,可以通过Avalon Slave 总线将period 和duty 值从Nios II 应用程序 传送到组件逻辑中。 3.Writedata:写数据。通过此数据线传送period 和duty 值。 4.Address:本例中有两个寄存器,因此可用一根地址线表示。 5.全局信号。本例中PWM 的输出用来驱动LED 灯显示,这个信号不属于Avalon 接 口信号。
Platform: | Size: 7165952 | Author: 黄龙 | Hits:

[VHDL-FPGA-VerilogCpldVhdl

Description: 用VHDL语言写的程序包含如下功能:1.键盘扫描2.控制AD转换3.产生PWM信号与51系列CPU接口,接在51地址数据总线上,单片机通过访问地址总线上的数据寄存器来控制CPLD-VHDL language used to write the procedure that contains the following functions: 1. Keyboard scan 2. Control of AD converters 3. Generate PWM signals with the 51 series CPU interface, and then in the address data bus 51, the single-chip by visiting the address bus data Register to control the CPLD
Platform: | Size: 455680 | Author: liubaogui | Hits:

[VHDL-FPGA-VerilogPWM

Description:
Platform: | Size: 433152 | Author: 黄朝谦 | Hits:

[Software EngineeringAB_PHASE_PWM_SOPC

Description: AB相编码器解码接口、PWM输出SOPC议案及其在运动控制卡和伺服驱动器中的应用-AB phase encoder decoder interface, PWM output SOPC motion and in motion control card and servo drive applications
Platform: | Size: 402432 | Author: 张贺 | Hits:

[VHDL-FPGA-Verilog5050PWM_V54

Description: FPGA 实现基于ISA接口的3路编码器计数,和3路PWM/DA输出 编码器计数包括倍频、鉴相 PWM实现12位分辨率-FPGA-based ISA interface 3 Road encoder counts, and 3-way PWM/DA output encoder counts, including frequency doubling, phase PWM realize 12-bit resolution
Platform: | Size: 1084416 | Author: 吴波 | Hits:

[source in ebookpwm

Description: 紧耦合存储比内存和cacsh都要快很多希望大家能够理解这个东西,非常好的参考,-Tightly coupled memory and storage than the much faster cacsh must hope that everyone can understand this thing, very good reference,
Platform: | Size: 362496 | Author: 李可 | Hits:

[VHDL-FPGA-VerilogCPLD_PWM

Description: 一个在CPLD,EPM70128上实现的PWM控制源程序。-A CPLD, EPM70128 realize the PWM control on the source.
Platform: | Size: 247808 | Author: 路伟希 | Hits:

[VHDL-FPGA-VerilogSVPWM

Description: 这是一个对电机进行SVPWM调速控制的VHDL源代码程序,包括了rtl主程序和测试sim仿真程序-This is a motor SVPWM Speed VHDL source code control procedures, including the main program and test rtl simulation program sim
Platform: | Size: 13312 | Author: 杨国超 | Hits:

[VHDL-FPGA-VerilogPWMtest

Description: 利用VHDL实现CPLD(EMP240T100C5)的PWM输出-Using VHDL realize CPLD (EMP240T100C5) of the PWM output
Platform: | Size: 174080 | Author: ZXQ | Hits:

[VHDL-FPGA-VerilogCPLD_Design_50

Description: CPLD实用设计50例,非常经典的CPLD设计,包含50个实际的典型应用,涉及直流电机PWM驱动,编码等内容,有了这50例,举一反三,就会了很多应用-50 cases of practical CPLD design, very classic CPLD design, including 50 typical practical applications, involving PWM DC motor driver, coding, etc., with these 50 cases, giving top priority will be a lot of applications
Platform: | Size: 7625728 | Author: 刘工 | Hits:

[VHDL-FPGA-Verilogan501_design_example

Description: VHDL语言实现PWM信号,非常方便的使用-VHDL language realize PWM signal, very convenient to use
Platform: | Size: 259072 | Author: zw | Hits:

[VHDL-FPGA-VerilogPWMVHDL

Description: 电机控制中PWM波产生的程序,VHDL语言实现-Motor Control PWM wave generated by the procedure, VHDL language
Platform: | Size: 166912 | Author: wg | Hits:

[VHDL-FPGA-VerilogFPGAdezizhixingSPWMboChengXu

Description: 基于FPGA的自治型SPWM波形发生器的设计!正弦脉宽调制(SPWM)技术在以电压源逆变电路为核心的电力电子装置中有着广泛的应用,如何产生SPWM脉冲序列及其实现手段是PWM技术的关键。大家共同探讨哈!-FPGA based SPWM autonomy-based waveform generator design! Sinusoidal pulse width modulation (SPWM) technology in the voltage source inverter circuit as the core of the power electronic devices have a wide range of applications, how to generate SPWM pulse sequence and its implementation means PWM technology is the key. Kazakhstan investigate everyone!
Platform: | Size: 4096 | Author: 小喻 | Hits:

[VHDL-FPGA-VerilogSOPC_pwm_source

Description: 在SOPC下制作自定义部件(PWM发生器)的源程序,包括硬件描述HDL文件和驱动程序文件-Produced in the SOPC custom component (PWM generator) of the source, including hardware description HDL files and driver files
Platform: | Size: 266240 | Author: 路得 | Hits:

[VHDL-FPGA-Verilogmoter

Description: VHDL写的PWM发生器,仿真通过,波形基本完美,可以用于直流电机的控制-PWM generator written in VHDL, simulation is passed, the basic waveform perfect, can be used for DC motor control
Platform: | Size: 897024 | Author: dansen | Hits:

[VHDL-FPGA-VerilogFPGA_PWM

Description: 用Verilog语言编写的FPGA控制PWM的程序.利用码盘脉冲进行调速,进行过简单试验,可用.没有经过长期验证.做简单修改即可应用!-Using Verilog languages FPGA control PWM procedures. Using pulse code disk for governor, conducted a simple test that can be used. Not after a long-term verification. To do a simple modification to the application!
Platform: | Size: 1024 | Author: 温海龙 | Hits:
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